Semiconductor substrate and semiconductor chip

ABSTRACT

A semiconductor substrate capable of detecting operating current of a MOSFET and diode current in a miniaturized MOSFET such as a trench-gate type MOSFET is provided. A semiconductor substrate includes a main current region and a current sensing region in which current smaller than main current flowing in the main current region flows. The main current region has a source electrode disposed on a main surface, the source electrode being in contact with a p-type semiconductor region (body) and an n + -type semiconductor region (source), and the current sensing region has a MOSFET current detecting electrode and a diode current detecting electrode on a main surface, the MOSFET current detecting electrode being in contact with the p-type semiconductor region (body) and the n + -type semiconductor region (source), the diode current detecting electrode being in contact with the p-type semiconductor region (body).

CROSS-REFERENCE TO RELATED APPLICATIONS

The present application claims priority from Japanese Patent ApplicationNo. 2010-62141 filed on Mar. 18, 2010, the content of which is herebyincorporated by reference into this application.

BACKGROUND

The present invention relates to a switching circuit of a switched-modepower supply device. More specifically, the present invention relates toa semiconductor substrate, a semiconductor chip and a semiconductordevice used in a switching circuit.

There is an existing technology of reducing conduction loss byshortening a conducting period of a body diode being parasitic to alow-side MOSFET of a synchronous rectifying device in a feedback periodin which a high-side MOSFET of a main switching device is off (forexample, Japanese Patent Application Laid-Open Publication No.2004-312913 (Patent Document 1)).

According to Patent Document 1, not to cause large through current tooccur when a high-side MOSFET of a main switching device and a low-sideMOSFET of a synchronous rectifying device are turned on at the sametime, the high-side MOSFET and the low-side MOSFET are alternatelyturned on and off with dead time provided to gate voltage signals.

According to Patent Document 1, by control for making the dead time ofthe turning on and off the MOSFETs, a conducting period of a body diodeparasitic to the low-side MOSFET in a feedback period in which thehigh-side MOSFET is on is shortened, thereby reducing conduction loss.

As a voltage to be applied to the body diode of the low-side MOSFET isswitched from a forward voltage to a reverse voltage upon turning on thehigh-side MOSFET, reverse current from a cathode to an anode, that is,recovery current flows in the body diode for a moment, thereby causingrecovery loss to occur.

To reduce the recovery loss, it has been known that crossing a high-sideMOSFET and a low-side MOS is effective (for example, Japanese PatentApplication Laid-Open Publication No. 2007-14059 (Patent Document 2)).However, if the switching timing is crossed too much, there is a problemthat large through current flows.

According to Patent Document 1, there is a limitation not to flow thethrough current at all, and thus the switching cannot be crossed forreducing the recovery loss. According to Patent Document 2, withpreventing large through current from flowing, the switching of thehigh-side MOSFET and the low-side MOSFET is crossed, thereby reducingthe recovery loss.

The switching circuit of Patent Document 2 includes first currentdetecting means which detects current flowing in the low-side MOSFET andsecond current detecting means which detects current flowing in the bodydiode of the low-side MOSFET, in which dead time is set to make boththrough current detected by the first current detecting means andrecovery current of the body diode detected by the second currentdetecting means small, and gate signals to the high-side MOSFET and thelow-side MOSFET are outputted. In this manner, as well as reducingrecovery loss by flowing the through current, large through current isprevented from flowing.

However, in a generally used MOSFET, a source electrode is in contactwith both a p-type body region and an n⁺-type source region, and thus itis difficult to independently detect operating current of the MOSFET andcurrent flowing in the body diode.

According to Japanese Patent Application Laid-Open Publication No.5-75131 (Patent Document 3), there is a problem that operating currentof a MOSFET cannot be independently detected while it is possible toindependently detect current flowing in a body diode.

To solve this problem, according to Japanese Patent ApplicationLaid-Open Publication No. 2006-310473 (Patent Document 4), structures ofa sensing MOSFET and a sensing diode capable of independently detectingoperating current of a MOSFET and current flowing in a parasitic diodeare suggested.

SUMMARY

Meanwhile, the sensing MOSFET and the sensing diode described in PatentDocument 4 have their electrodes split in two on a surface of asemiconductor substrate and one of the split electrodes (electrode ofthe sensing MOSFET) is connected to an n⁺-type source region, and theother one (the sensing diode) is connected to a p-type body region, andthus, while it is able to use the sensing MOSFET and sensing diode to aplaner-type MOSFET, there has been a problem of difficulty in using themto a miniaturized MOSFET such as a trench-gate type MOSFET.

Accordingly, preferred aims of the present invention are to solve theproblems in above-mentioned existing technologies, and to provide asemiconductor substrate, a semiconductor chip and a semiconductor devicecapable of detecting operating current of a MOSFET and diode current ina miniaturized MOSFET such as a trench-gate type MOSFET.

The above and other preferred aims and novel characteristics of thepresent invention will be apparent from the descriptions of the presentspecification and the accompanying drawings.

The typical ones of the inventions disclosed in the present applicationwill be briefly described as follows.

More specifically, as a brief summary of the typical one of theinventions, a semiconductor substrate includes: a first semiconductorregion on a main surface of a substrate; a second semiconductor regionformed in the first semiconductor region and having a conductivityopposite to that of the first semiconductor region; and a thirdsemiconductor region formed in the second semiconductor region andhaving the same conductivity as the first semiconductor region, thesemiconductor substrate having a main current region and a currentdetecting region in which current smaller than main current flowing inthe main current region flows, in which the main current region has asecond conductor disposed on a main surface of the main current region,the second conductor being in contact with the second semiconductorregion and the third semiconductor region, and the current detectingregion has a third conductor and a fourth conductor disposed on a mainsurface of the current detecting region, the third conductor being incontact with the second semiconductor region and the third semiconductorregion, the fourth conductor being in contact with the second conductor.

The effects obtained by typical aspects of the present invention will bebriefly described below.

More specifically, an effect obtained by the typical one of the presentinventions is that operating current of a MOSFET and diode current canbe detected in a miniaturized MOSFET such as a trench-gate type MOSFET,and therefore it is possible to achieve low loss and low noise in aswitching circuit of a power supply etc.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view illustrating a configuration of asemiconductor substrate according to a first embodiment of the presentinvention;

FIG. 2 is a diagram illustrating a relationship between dead time andcurrent for describing an effect obtained by detecting operating currentof a MOSFET and diode current by the semiconductor substrate accordingto the first embodiment of the present invention;

FIG. 3 is a diagram illustrating a relationship between dead time andpower loss for describing an effect obtained by detecting operatingcurrent of a MOSFET and diode current by the semiconductor substrateaccording to the first embodiment of the present invention;

FIG. 4 is a diagram illustrating a relationship between dead time andspike voltage for describing an effect obtained by detecting operatingcurrent of a MOSFET and diode current by the semiconductor substrateaccording to the first embodiment of the present invention;

FIG. 5 is a cross-sectional view illustrating a configuration of asemiconductor substrate according to a second embodiment of the presentinvention;

FIG. 6 is a circuit diagram illustrating a configuration of aswitched-mode power supply device according to a third embodiment of thepresent invention using a semiconductor substrate;

FIG. 7 is a plan view illustrating a configuration of a semiconductordevice according to a fourth embodiment of the present inventionmounting a semiconductor substrate;

FIG. 8 is a plan view illustrating a configuration of a semiconductordevice according to a fifth embodiment of the present invention mountinga semiconductor substrate; and

FIG. 9 is a circuit diagram illustrating a configuration of aswitched-mode power supply device according to a sixth embodiment of thepresent invention using a semiconductor substrate.

DETAILED DESCRIPTION

Hereinafter, embodiments of the present invention will be described indetail with reference to the accompanying drawings. Note that componentshaving the same function are denoted by the same reference symbolsthroughout the drawings for describing the embodiment, and therepetitive descriptions thereof will be omitted.

First Embodiment

With reference to FIG. 1, a configuration of a semiconductor substrateaccording to a first embodiment of the present invention will bedescribed. FIG. 1 is a cross-sectional view illustrating a configurationof the semiconductor substrate according to the first embodiment of thepresent invention, illustrating a cross-sectional view of a trench-gatetype MOSFET.

In FIG. 1, a semiconductor substrate (a semiconductor chip or asemiconductor device) 1 is formed of a main current region 2 and acurrent sensing region 3 that is a current detecting region. The maincurrent region 2 is formed of an n⁺-type semiconductor region (drain),an n⁻-type semiconductor region 5 that is a first semiconductor region,a p-type semiconductor region 6 (body) that is a second semiconductorregion, an n⁺-type semiconductor region 7 (source) that is a thirdsemiconductor region, a source electrode 8 that is a second conductor,and a drain electrode 9.

The current sensing region 3 is formed of an n⁺-type semiconductorregion 4 (drain), an n⁻-type semiconductor region 5, a p-typesemiconductor region 6 (body), an n⁺-type semiconductor region 7(source), a MOSFET current detecting electrode 10 that is a thirdconductor, and a diode current detecting electrode 11 that is a fourthconductor.

In addition, trenches are formed in the n⁻-type semiconductor region 5,the p-type semiconductor region 6 (body), and the n⁺-type semiconductorregion 7 (source), and gate electrodes 12 which are first conductors areformed on a gate insulator (not illustrated) formed in the trenches, asillustrated in FIG. 1.

Also, an insulating film 13 is formed between the gate electrode 12 andthe source 8, the MOSFET current detecting electrode 10, and the diodecurrent detecting electrode 11.

While the main current region 2 is similar to that in an existingtrench-gate type MOSFET, the current sensing region 3 has a surfaceelectrode being separated into the MOSFET current detecting electrode 10and the diode current detecting electrode 11. In the current sensingregion 3, the p-type semiconductor region 6 (body) and the n⁺-typesemiconductor region 7 (source) are provided to a portion with which theMOSFET current detecting electrode 10 is in contact, and only the p-typesemiconductor region 6 (body) is provided to a portion with which thediode current detecting electrode 11 is in contact.

As the diode current detecting electrode 11 is in contact with thep-type semiconductor region 6 (body), the diode current detectingelectrode 11 detects only the diode current. On the other hand, as theMOSFET current detecting electrode 10 is in contact with the p-typesemiconductor region 6 (body) and the n⁺-type semiconductor region 7(source), the MOSFET current detecting electrode 10 detects a totalvalue of the MOSFET current and the diode current.

Meanwhile, an aim of providing the MOSFET current detecting electrode 10is to detect the through current of the MOSFET, and thus there is noproblem in the detected amount being a total value of the MOSFET currentand diode current.

Next, with reference to FIGS. 2 to 4, effects of detecting the operatingcurrent of the MOSFET and the diode current by the semiconductorsubstrate according to the first embodiment of the present inventionwill be described. FIGS. 2 to 4 are explanatory diagrams for describingeffects of detecting the operating current of the MOSFET and the diodecurrent by the semiconductor substrate according to the first embodimentof the present invention, in which FIG. 2 is a diagram illustrating arelationship between dead time and current, FIG. 3 is a diagramillustrating a relationship between dead time and power loss, and FIG. 4is a diagram illustrating a relation of dead time and spike voltage.

In FIG. 2, the horizontal axis is dead time, and the vertical axis isMOSFET current and diode current to be detected by the semiconductorsubstrate of the present embodiment, in which the MOSFET current isthrough current flowing in a direction from the drain to the source, andthe diode current indicates recovery current flowing from a cathode toan anode.

Here, the dead time on the horizontal axis is a period in which the gatevoltages of both of high-side and low-side MOSFETs in a switched-modepower supply device composed of the semiconductor substrate are off. Asillustrated in FIG. 2, the diode current becomes smaller as the deadtime becomes shorter, and the decrease of diode current is saturatedwhen the dead time is 10 ns to 0 ns. A reason of the decrease in therecovery current of the diode when the dead time is 10 ns to 0 ns isthat injection of holes which are minority carriers is decreased whenthe dead time is short.

The recovery current of the diode includes a component associated withthe minority carrier and a component associated with a junctioncapacitance of a pn junction between the p-type semiconductor region 6(body) and the n⁻-type semiconductor region 5. The component associatedwith the minority carrier can be reduced by shortening the dead time,but the component associated with the junction capacitance cannot bereduced. A reason of the saturation of the decrease in the recoverycurrent of the diode when the dead time is smaller than or equal to 0 nsis that the component associated with the junction capacitance isdominant.

Also, while the through current of the MOSFET is suppressed to about 3 Awhen the dead time is 0 ns to 25 nm, the through current is abruptlyincreased when the dead time reaches −5 ns. This is because thehigh-side and low-side MOSFETs are turned on at the same time and thuslarge through current flows.

A reason of having the through current (about 3 A) of the MOSFET flowingeven when the dead time is set to be sufficiently long is that the drainvoltage of the low-side MOSFET is increased when the high-side MOSFET isturned on, increasing the gate voltage due to the capacitance couplingbetween the gate and drain and turning on the low-side MOSFET.

This phenomenon is called “self turn-on” or “false turn-on.” There is amethod of suppressing the “self turn-on” by reducing a turn-on speed ofthe high-side MOSFET or increasing a threshold voltage of the gatevoltage of the low-side MOSFET.

Next, a method of optimizing the dead time using the recovery current ofthe body diode and the through current of the MOSFET will be described.

The method of optimizing the dead time is as follows.

(1) The dead time is gradually shortened from a sufficiently long deadtime which does not allow the through current of the MOSFET to flow, andthe recovery current of the diode and the through current of the MOSFETare detected.

(2) A range of dead time which makes the recovery current of the diodeminimum is derived and dead time within the range at which the throughcurrent of the MOSFET does not abruptly increase is determined to be anoptimum value.

According to the method of optimizing dead time as described above, inthe example illustrated in FIG. 2, an optimum value of dead time is 0ns.

However, the optimum value of dead time differs depending on types ofMOSFETs and circuit conditions (input voltage, output current,temperature, etc.).

In addition, as illustrated in the diagram of FIG. 3 illustrating arelationship between dead time and power loss, by setting the dead timeto an optimum value (0 ns), loss can be minimized.

Also, FIG. 4 illustrates a relationship between dead time and spikevoltage, in which the spike voltage is a difference between surgevoltage of the drain of the low-side MOSFET and input voltage (12 V)upon turning on the high-side MOSFET. By optimizing the dead time to 0ns, the spike voltage can be minimum.

There are two merits in reducing the spike voltage.

(1) Noise reduction: Noise can be classified into two kinds, radiationnoise and conduction noise, and this suppression of spike voltagereduces these two kinds of noise.

(2) Reduction of conduction loss of the MOSFET: As the spike voltage islowered, a low-withstand-voltage MOSFET can be used, thereby reducing anon resistance of the MOSFET (∝ conduction loss).

As described above, according to the present embodiment, operatingcurrent and diode current can be detected in a trench-gate type MOSFET,and thus it is possible to easily perform optimization of dead time.

Second Embodiment

A semiconductor substrate of a second embodiment has the MOSFET currentdetecting electrode 10 being in contact with only the n⁺-typesemiconductor region 7 (source) in the semiconductor substrate of thefirst embodiment.

With reference to FIG. 5, a configuration of the semiconductor substrateaccording to the second embodiment of the present invention will bedescribed. FIG. 5 is a cross-sectional view illustrating a configurationof the semiconductor substrate according to the second embodiment of thepresent invention.

In FIG. 5, different points from the semiconductor substrate 1illustrated in FIG. 1 of the first embodiment are the following twopoints.

(1) The MOSFET current detecting electrode 10 is in contact with onlythe n⁺-type semiconductor region 7 (source) and is not in contact withthe p-type semiconductor region 6 (body).

Note that, as illustrated in FIG. 5, a part of the MOSFET currentdetecting electrode 10 is not in contact with the n⁺-type semiconductorregion 7 (source) and it is because current does not flow even when thepart of the MOSFET current detecting electrode 10 is in contact with then⁺-type semiconductor region 7 (source).

(2) Interval of the gate electrodes 12 in the current sensing region 3(interval of the gate electrodes 12 under the MOSFET current detectingelectrode 10 and the diode current detecting electrode 11) is largerthan interval of the gate electrodes 12 in the main current region 2.

In this manner, according to the second embodiment, by using theabove-described structure, it is possible to completely separatelydetect the MOSFET current and the diode current. A method of optimizingdead time after detecting the MOSFET current and diode current is thesame as that of the first embodiment.

Third Embodiment

In the first embodiment, a method of optimizing dead time by detectingthe recovery current of the diode and current of the MOSFET has beendescribed. Meanwhile, the high-side and low-side MOSFETs are switched ata high speed in a switching circuit in an actual switched-mode powersupply device, and thus the currents immediately after turning on thehigh-side MOSFET have large fluctuation and it makes difficult to detectabsolute values of the currents at high accuracy.

Therefore, according to the third embodiment, after converting thedetected current values to voltages, the voltages are inputted to anoperational amplifier via a low-pass filter so that influence of thecurrent fluctuation is suppressed.

With reference to FIG. 6, a configuration of a switched-mode powersupply device according to the third embodiment using a semiconductorsubstrate of the present invention will be described. FIG. 6 is acircuit diagram illustrating the configuration of the switched-modepower supply device using a semiconductor substrate according to thethird embodiment of the present invention.

In FIG. 6, the switched-mode power supply device is composed of an inputpower supply 21, an input capacitor 22, a high-side MOSFET 23, alow-side MOSFET 24, a gate driving circuit of high-side MOSFET 25, agate driving circuit of low-side MOSFET 26, a choke coil 27, an outputcapacitor 28, load 29, an error amplifier 30, a PWM converter 31, acurrent detector of sensing MOSFET and sensing diode 32, a low-passfilter 33, an operational amplifier 34, and dead time detecting portion35.

In FIG. 6, the low-side MOSFET 24 is composed of the main current region2 of the semiconductor substrate 1 illustrated in FIG. 1, and thecurrent detector of sensing MOSFET and sensing diode 32 is composed ofthe current sensing region 3 of the semiconductor substrate 1illustrated in FIG. 1.

While an absolute value of the recovery current of the diode cannot bedetected by inserting the low-pass filter 33, fluctuation of current canbe suppressed and it is possible to optimize dead time by changes incurrent values as illustrated in FIG. 2 in accordance with output of thelow-pass filter.

Fourth Embodiment

A fourth embodiment is a semiconductor device mounting the semiconductorsubstrate 1 of the first or second embodiments.

With reference to FIG. 7, a configuration of a semiconductor devicemounting a semiconductor substrate as a low-side MOSFET according to thefourth embodiment will be described. FIG. 7 is a plan view illustratingthe semiconductor device mounting a semiconductor substrate according tothe fourth embodiment of the present invention.

In FIG. 7, a semiconductor device 41 mounts the high-side MOSFET 23, thelow-side MOSFET 24, and a driver IC 42 that is a driving device fordriving these MOSFETs in one package, and is called a system in package(SiP).

The low-side MOSFET 24 is composed of the semiconductor substrate of thefirst or second embodiments.

In addition, to drive the gate of the high-side MOSFET 23, the driver IC42 and the high-side MOSFET 23 are connected through two lines of a wirefor gate 43 and a wire for source 44.

To the low-side MOSFET 24, a pad for source, a pad for gate, a pad fordetecting current, and a pad for detecting body diode current areprovided, and, via these pads, the low-side MOSFET 24 and the driver IC42 are connected through a wire for sensing MOSFET 47 and a wire forsensing diode 48 in addition to a wire for gate 46 and a wire for source45.

The wire for sensing MOSFET 47 and the wire for sensing diode 48 areconnected to a resistor formed to the driver IC 42 in series, andcurrent is detected by a voltage across both ends of the resistor. Thedetection of current by the resistor connected to the sensing MOSFET inseries is described in Japanese Patent Application Laid-Open PublicationNo. 2009-75957 etc.

In the fourth embodiment, the low-side MOSFET 24 composed of thesemiconductor substrate 1 of the first or second embodiments is mountedon the semiconductor device 41, and the wire for sensing MOSFET 47 andthe wire for sensing diode 48 are connected to the driver IC 42.Therefore, it is possible to perform control by the driver IC 42 at goodaccuracy.

Therefore, it is possible to reduce loss and noise of the switched-modepower supply device by composing the switched-mode power supply deviceusing the semiconductor device 41 of the fourth embodiment.

Fifth Embodiment

A fifth embodiment is a semiconductor device according to the fourthembodiment in which the wire for sensing MOSFET 47 and the wire forsensing diode 48 are connected to a lead frame terminal of thesemiconductor device 41 and a current detection is performed outside thesemiconductor device 41, and information of the current detection isinputted to the driver IC 42.

With reference to FIG. 8, a configuration of the semiconductor deviceaccording to the fifth embodiment of the present invention mounting asemiconductor substrate as a low-side MOSFET will be described. FIG. 8is a plan view illustrating the configuration of the semiconductordevice mounting a semiconductor substrate according to the fifthembodiment of the present invention.

In FIG. 8, a different point from the semiconductor device in FIG. 7 ofthe fourth embodiment is that the wire for sensing MOSFET 47 and thewire for sensing diode 48 are connected to lead frame terminals of thesemiconductor device 41. In addition, the driver IC 42 is connected tolead frame terminals for inputting information of a current detectionfrom outside the semiconductor device 41.

As the fourth embodiment, when a resistor connected to the sensingMOSFET and sensing diode in series is formed to the driver IC 42,sometimes a resistor having high accuracy cannot be used. Meanwhile, asthe fifth embodiment, when the wire for sensing MOSFET 47 and the wirefor sensing diode 48 are connected to lead frame terminals and furtherconnected to the resistor which is externally attached, a resistorhaving high accuracy externally attached can be used and thus it ispossible to perform a current detection at high accuracy.

Sixth Embodiment

A sixth embodiment is a switched-mode power supply device using thesemiconductor substrate of the first or second embodiments to a low-sideMOSFET of the switched-mode power supply device.

With reference to FIG. 9, a configuration of the switched-mode powersupply device according to the sixth embodiment using a semiconductorsubstrate will be described. FIG. 9 is a circuit diagram illustratingthe configuration of the switched-mode power supply device according tothe sixth embodiment using a semiconductor substrate.

In FIG. 9, the switched-mode power supply device is composed of theinput power supply 21, the input capacitor 22, the high-side MOSFET 23,the low-side MOSFET 24, the gate driving circuit of high-side MOSFET 25,the gate driving circuit of low-side MOSFET 26, the choke coil 27, theoutput capacitor 28, the load 29, the error amplifier 30, the PWMconverter 31, the dead time control portion 35, a current sensing MOSFET36, a current sensing diode 37, current sensing resistors 38 and 39, andoperational amplifiers 34 and 40.

In FIG. 9, the low-side MOSFET 24 is composed of the main current region2 of the semiconductor substrate 1 illustrated in FIG. 1, and thecurrent sensing MOSFET 36 and the current sensing diode 37 are composedof the current sensing region 3 of the semiconductor substrate 1illustrated in FIG. 1.

In addition, areas of the current sensing MOSFET 36 and the currentsensing diode 37 are as small as 1/1000 or 1/10000 of an area of thelow-side MOSFET 24 in the main current region 2, and thus very smallcurrent flows in the current sensing MOSFET 36 and the current sensingdiode 37 and loss due to the resistors 38 and 39 is small.

Then, voltages across both ends of the resistors 38 and 39 are detectedand the dead time is controlled by the dead time control portion 35.

According to the sixth embodiment, as the semiconductor substrate 1 ofthe first or second embodiments is used to the low-side MOSFET of theswitched-mode power supply device, and the current sensing MOSFET 36 andthe current sensing diode 37 are composed of the current sensing region3 of the semiconductor substrate 1, it is possible to perform a currentdetection at good accuracy, and reduction in loss and noise of theswitched-mode power supply device can be achieved.

In the foregoing, the invention made by the inventor of the presentinvention has been concretely described based on the embodiments.However, it is needless to say that the present invention is not limitedto the foregoing embodiments and various modifications and alterationscan be made within the scope of the present invention.

For example, while the example of using the semiconductor substrate 1 ofthe first or second embodiments to the low-side MOSFET has beendescribed in the fourth to sixth embodiments, current may be detected byusing the semiconductor substrate 1 of the first or second embodimentsto the high-side MOSFET.

The present invention relates to a semiconductor substrate and asemiconductor chip and is widely applicable to semiconductor substratesusing a trench-gate type MOSFET and semiconductor devices mounting asemiconductor substrate.

1. A semiconductor substrate comprising: a first semiconductor region ona main surface of a substrate; a second semiconductor region formed inthe first semiconductor region and having a conductivity opposite tothat of the first semiconductor region; a third semiconductor regionformed in the second semiconductor region and having the sameconductivity as the first semiconductor region; grooves formed in thefirst semiconductor region, the second semiconductor region, and thethird semiconductor region and extending in a first direction on themain surface of the substrate; a first insulating film formed in thegrooves; and a first conductor formed on the first insulating film,wherein the semiconductor substrate has a main current region and acurrent detecting region in which current smaller than main currentflowing in the main current region flows, wherein the main currentregion has a second conductor disposed on a main surface of the maincurrent region, the second conductor being in contact with the secondsemiconductor region and the third semiconductor region, and wherein thecurrent detecting region has a third conductor and a fourth conductordisposed on a main surface of the current detecting region, the thirdconductor being in contact with the second semiconductor region and thethird semiconductor region, and the fourth conductor being in contactwith the second conductor.
 2. A semiconductor substrate comprising: afirst semiconductor region on a main surface of a substrate; a secondsemiconductor region formed in the first semiconductor region and havinga conductivity opposite to that of the first semiconductor region; athird semiconductor region formed in the second semiconductor region andhaving the same conductivity as the first semiconductor region; groovesformed in the first semiconductor region, the second semiconductorregion, and the third semiconductor region and extending in a firstdirection on the main surface of the substrate; a first insulating filmformed in the grooves; and a first conductor formed on the firstinsulating film, wherein the semiconductor substrate has a main currentregion and a current detecting region in which current smaller than maincurrent flowing in the main current region flows, wherein the maincurrent region has a second conductor disposed on a main surface of themain current region, the second conductor being in contact with thesecond semiconductor region and the third semiconductor region, whereinthe current detecting region has a third conductor and a fourthconductor disposed on a main surface of the current detecting region,the third conductor being in contact with the third semiconductorregion, and the fourth conductor being in contact with the secondconductor, and wherein interval of the grooves in the current detectingregion is larger than interval of the grooves in the main currentregion.
 3. A semiconductor device in one package comprising: a firstswitching device; a second switching device, the first switching deviceand the second switching device being connected in series between avoltage input terminal and a reference voltage terminal; and a drivingcircuit that complementarily drives the first switching device and thesecond switching device, wherein the second switching device is composedof the semiconductor substrate according to claim 1 and includes atleast four pads, the four pads are composed of a pad for gate, a pad forsource, a pad for detecting current, and a pad for detecting body diodecurrent, the pad for gate, the pad for source, the pad for detectingcurrent, the pad for detecting body diode current are connected to thefirst conductor, the second conductor, the third conductor, and thefourth conductor of the semiconductor substrate, respectively, and thedriving device and the four pads are connected by bonding wires.
 4. Asemiconductor device in one package comprising: a first switchingdevice; a second switching device, the first switching device and thesecond switching device being connected in series between a voltageinput terminal and a reference voltage terminal; and a driving circuitthat complementarily drives the first switching device and the secondswitching device, wherein the second switching device is composed of thesemiconductor substrate according to claim 1 and includes at least fourpads, the four pads are composed of a pad for gate, a pad for source, apad for detecting current, and a pad for detecting body diode current,the pad for gate, the pad for source, the pad for detecting current, thepad for detecting body diode current are connected to the firstconductor, the second conductor, the third conductor, and the fourthconductor of the semiconductor substrate, respectively, and the drivingdevice and the four pads are connected by bonding wires, and wherein thefirst switching device is also composed of the semiconductor substrateaccording to claim 1 and includes at least four pads, the four pads arecomposed of a pad for gate, a pad for source, a pad for detectingcurrent, and a pad for detecting body diode current, the pad for gate,the pad for source, the pad for detecting current, the pad for detectingbody diode current are connected to the first conductor, the secondconductor, the third conductor, and the fourth conductor of thesemiconductor substrate, respectively, and the driving device and thefour pads of each of the first switching device and the second switchingdevice are connected by bonding wires.
 5. The semiconductor deviceaccording to claim 3, wherein the driving device includes a firstresistor connected to the pad for detecting current and a secondresistor connected to the pad for detecting body diode current inside,detects voltages across both ends of the first resistor and the secondresistor, and controls dead time of the first switching device and thesecond switching device.
 6. The semiconductor device according to claim5, wherein the driving device detects the voltages across both ends ofthe first resistor and the second resistor through a low-pass filter. 7.A semiconductor device in one package comprising: a first switchingdevice; a second switching device, the first switching device and thesecond switching device being connected in series between a voltageinput terminal and a reference voltage terminal; and a driving circuitthat complementarily drives the first switching device and the secondswitching device, wherein the second switching device is composed of thesemiconductor substrate according to claim 1 and includes at least fourpads, the four pads are composed of a pad for gate, a pad for source, apad for detecting current, and a pad for detecting body diode current,the pad for gate, the pad for source, the pad for detecting current, thepad for detecting body diode current are connected to the firstconductor, the second conductor, the third conductor, and the fourthconductor of the semiconductor substrate, respectively, the drivingdevice, the pad for source, and the pad for gate are connected bybonding wires, and the pad for detecting current and the pad fordetecting body diode current are connected to lead frame terminals ofthe semiconductor device by bonding wires.
 8. A semiconductor device inone package comprising: a first switching device; a second switchingdevice, the first switching device and the second switching device beingconnected in series between a voltage input terminal and a referencevoltage terminal; and a driving circuit that complementarily drives thefirst switching device and the second switching device, wherein thesecond switching device is composed of the semiconductor substrateaccording to claim 1 and includes at least four pads, the four pads arecomposed of a pad for gate, a pad for source, a pad for detectingcurrent, and a pad for detecting body diode current, the pad for gate,the pad for source, the pad for detecting current, the pad for detectingbody diode current are connected to the first conductor, the secondconductor, the third conductor, and the fourth conductor of thesemiconductor substrate, respectively, the driving device, the pad forsource, and the pad for gate are connected by bonding wires, and the padfor detecting current and the pad for detecting body diode current areconnected to lead frame terminals of the semiconductor device by bondingwires, and wherein the first switching device is also composed of thesemiconductor substrate according to claim 1 and includes at least fourpads, the four pads are composed of a pad for gate, a pad for source, apad for detecting current, and a pad for detecting body diode current,the pad for gate, the pad for source, the pad for detecting current, thepad for detecting body diode current are connected to the firstconductor, the second conductor, the third conductor, and the fourthconductor of the semiconductor substrate, respectively, the drivingdevice and the pads for source and the pads for gate of the firstswitching device and the second switching device are connected bybonding wires, and the pads for detecting current and the pads fordetecting body diode of the first switching device and the secondswitching device are connected to lead frame terminals of thesemiconductor device by bonding wires.
 9. The semiconductor deviceaccording to claim 7, wherein a first resistor and a second resistor areconnected to the lead frame terminals to which the pad for detectingcurrent and the pad for detecting body diode current are connected, andthe driving terminal detects voltages across both ends of the firstresistor and the second resistor, and controls dead time of the firstswitching device and the second switching device.
 10. The semiconductordevice according to claim 9, wherein the driving device detects thevoltages across both ends of the first resistor and the second resistorvia a low-pass filter.
 11. A semiconductor device in one packagecomprising: a first switching device; a second switching device, thefirst switching device and the second switching device being connectedin series between a voltage input terminal and a reference voltageterminal; and a driving circuit that complementarily drives the firstswitching device and the second switching device, wherein the secondswitching device is composed of the semiconductor substrate according toclaim 2 and includes at least four pads, the four pads are composed of apad for gate, a pad for source, a pad for detecting current, and a padfor detecting body diode current, the pad for gate, the pad for source,the pad for detecting current, the pad for detecting body diode currentare connected to the first conductor, the second conductor, the thirdconductor, and the fourth conductor of the semiconductor substrate,respectively, and the driving device and the four pads are connected bybonding wires.
 12. A semiconductor device in one package comprising: afirst switching device; a second switching device, the first switchingdevice and the second switching device being connected in series betweena voltage input terminal and a reference voltage terminal; and a drivingcircuit that complementarily drives the first switching device and thesecond switching device, wherein the second switching device is composedof the semiconductor substrate according to claim 2 and includes atleast four pads, the four pads are composed of a pad for gate, a pad forsource, a pad for detecting current, and a pad for detecting body diodecurrent, the pad for gate, the pad for source, the pad for detectingcurrent, the pad for detecting body diode current are connected to thefirst conductor, the second conductor, the third conductor, and thefourth conductor of the semiconductor substrate, respectively, and thedriving device and the four pads are connected by bonding wires, andwherein the first switching device is also composed of the semiconductorsubstrate according to claim 2 and includes at least four pads, the fourpads are composed of a pad for gate, a pad for source, a pad fordetecting current, and a pad for detecting body diode current, the padfor gate, the pad for source, the pad for detecting current, the pad fordetecting body diode current are connected to the first conductor, thesecond conductor, the third conductor, and the fourth conductor of thesemiconductor substrate, respectively, and the driving device and thefour pads of each of the first switching device and the second switchingdevice are connected by bonding wires.
 13. The semiconductor deviceaccording to claim 11, wherein the driving device includes a firstresistor connected to the pad for detecting current and a secondresistor connected to the pad for detecting body diode current inside,detects voltages across both ends of the first resistor and the secondresistor, and controls dead time of the first switching device and thesecond switching device.
 14. The semiconductor device according to claim13, wherein the driving device detects the voltages across both ends ofthe first resistor and the second resistor through a low-pass filter.15. A semiconductor device in one package comprising: a first switchingdevice; a second switching device, the first switching device and thesecond switching device being connected in series between a voltageinput terminal and a reference voltage terminal; and a driving circuitthat complementarily drives the first switching device and the secondswitching device, wherein the second switching device is composed of thesemiconductor substrate according to claim 2 and includes at least fourpads, the four pads are composed of a pad for gate, a pad for source, apad for detecting current, and a pad for detecting body diode current,the pad for gate, the pad for source, the pad for detecting current, thepad for detecting body diode current are connected to the firstconductor, the second conductor, the third conductor, and the fourthconductor of the semiconductor substrate, respectively, the drivingdevice, the pad for source, and the pad for gate are connected bybonding wires, and the pad for detecting current and the pad fordetecting body diode current are connected to lead frame terminals ofthe semiconductor device by bonding wires.
 16. A semiconductor device inone package comprising: a first switching device; a second switchingdevice, the first switching device and the second switching device beingconnected in series between a voltage input terminal and a referencevoltage terminal; and a driving circuit that complementarily drives thefirst switching device and the second switching device, wherein thesecond switching device is composed of the semiconductor substrateaccording to claim 2 and includes at least four pads, the four pads arecomposed of a pad for gate, a pad for source, a pad for detectingcurrent, and a pad for detecting body diode current, the pad for gate,the pad for source, the pad for detecting current, the pad for detectingbody diode current are connected to the first conductor, the secondconductor, the third conductor, and the fourth conductor of thesemiconductor substrate, respectively, the driving device, the pad forsource, and the pad for gate are connected by bonding wires, and the padfor detecting current and the pad for detecting body diode current areconnected to lead frame terminals of the semiconductor device by bondingwires, and wherein the first switching device is also composed of thesemiconductor substrate according to claim 2 and includes at least fourpads, the four pads are composed of a pad for gate, a pad for source, apad for detecting current, and a pad for detecting body diode current,the pad for gate, the pad for source, the pad for detecting current, thepad for detecting body diode current are connected to the firstconductor, the second conductor, the third conductor, and the fourthconductor of the semiconductor substrate, respectively, the drivingdevice and the pads for source and the pads for gate of the firstswitching device and the second switching device are connected bybonding wires, and the pads for detecting current and the pads fordetecting body diode of the first switching device and the secondswitching device are connected to lead frame terminals of thesemiconductor device by bonding wires.
 17. The semiconductor deviceaccording to claim 15, wherein a first resistor and a second resistorare connected to the lead frame terminals to which the pad for detectingcurrent and the pad for detecting body diode current are connected, andthe driving terminal detects voltages across both ends of the firstresistor and the second resistor, and controls dead time of the firstswitching device and the second switching device.
 18. The semiconductordevice according to claim 17, wherein the driving device detects thevoltages across both ends of the first resistor and the second resistorvia a low-pass filter.